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NJU6356
SERIAL I/O REAL TIME CLOCK
sGENERAL DESCRIPTION The NJU6356 series is a serial I/O real time clock suitable for 4 bits microprocessor. It contains quartz crystal oscillator, counter, shift register, voltage regulator, voltage detector and interface controller. The NJU6356 series required only 4-port of microprocessor for data transfer, and the microprocessor can receive the data at any time when the microprocessor requires. The operating voltage is as wide as 2.0V to 5.5V, consequently, the NJU6356 series can count accurate time data even if the back up period. Furthermore, the long time back up is available as the operating current during the back up period is less than 3uA(TYP). sFEATURES qLow Operating Voltage qLow Operating Current sPACKAGE OUTLINE
NJU6356ED
NJU6356EM
sPIN CONFIGURATION
I/O XT XT VSS VDD DATA CLK CE
2.0 to 3.6V 3.0uA (TYP) @2.0V 3.0uA (TYP) @3.0V 4.0uA (TYP) @5.0V qBCD Counts of Seconds, Minutes, Hours, Days of Week Day, Month and Year qRequired only 4-port DATA, CLK, CE and I/O qLow Battery Detector Low Voltage Alarm Signal Output qAutomatic Leap Year Compensation Up to AD 2099 qPackage Outline DIP8 / DMP8 qC-MOS Technology
sLINE-UP TABLE Type No. Output Data NJU6356 E Seconds, Minutes, Hours, Days of Week, Day, Month, Year
Oscillation Capacitor Cd=21pF / Cg=21pF on Chip
sBLOCK DIAGRAM
XT XT Oscillator Divider Timer Counter Sec. Min. Hr.
Days of W eek
Day
Month
Year
Sec.
Min.
Hr.
Days of W eek
Day
Month
Year
DATA
Shift Register
I/O V SS V DD Controller & Clock Counter Voltage Detector CLK CE
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NJU6356
sTREMINAL DESCRIPTION No. SYMBOL FUNCTION I/O Input/Output Select Terminal for DATA Terminal 1 "H" : Input, "L" : Output During the CE terminal is "L", the DATA terminal is high impedance. Quartz Crystal Connecting Terminal (f=32.768kHz) 2 XT Refer to the line-up table for internal Cg, Cd value. XT 3 Chip Enable Input Terminal (with Pull-down Resistance) "H" : DATA input/output is available. 5 CE "L" : DATA terminal is high impedance. When the CE signal is which rising edge or falling edge, the CLK signal should be fixed to "L". Clock Input Terminal 6 CLK The DATA input/output is synchronized this clock. When the CE terminal is "L" the DATA terminal is high impedance. Serial Timer Data Input/Output Terminal I/O CE DATA H H Input 7 DATA L H Output H L High Impedance L L High Impedance 8 4 VDD VSS Power Supply GND
sFUNCTIONAL DESCRIPTION 1. Timer Data Structure The NJU6356 using BCD code which consisting of 4 bits per 1 digit. The calender function including the last date of each month and the leap year calculation is executed automatically. The unused bit for the timer data is "0".
Timer Data Bit Map MSB 0 S6 0 0 LSB S0 Range 0 to 59 0 to 59 0 to 23 1 to 7 1 to 31 1 to 12 0 to 99
Second Minute Hour Days of Week Day Month Year
S5
S4
S3
S2
S1
m6 m5 m4 m3 m2 m1 m0 0 H5 H4 H3 H2 H1 H0 0 W2 W1 W0
0 0 Y7
0 0 Y6
D5 D4 D3 D2 D1 D0 0 Y5 M4 M3 M2 M1 M0 Y4 Y3 Y2 Y1 Y0
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NJU6356
2. Timer Data Reading When the I/O termianl is "L" and the CE tarminal is "H", timer data can read out. The output is LSB first and the output data strings is shown below. The timer data is transferred from timer counter to shift register at rising edge of the chip enable on the CE terminal, and output the LSB of the timer data from the DATA terminal. Afterward the timer data in the shift register shift by synchronized at the falling edge of clock signal on the CLK terminal and output from the DATA terminal. If the timer data is updated in the data output, there are one second difference between timer data and output data. Type E Days of Hour Minute Second Week The data is read out from LSB of Year, and first 52-bit is effective. Year Month Day If the low voltage detector detect the low battery, (EE)H is written into each digit of timer data and read out. code of (EE)H is a warning for the broken. The
< Read Out Timing >
CLK
CE I/O Data Output 0 1 2 3 4 Year Shift Register 0 1 2 3 4 5 6 7 3 5 6 7 3 4 5 6 7
Second 4 5 6 7
(1) (2)
The timer data is transferred to the shift register at rising edge of the CE (1) and LSB of the timer data is output to the DATA terminal. Afterward the timer data in the shift register shift by synchronized at falling edge of the CLK(2) then output to the DATA terminal time-to-time.
Note) When the CE signal is which rising edge or falling edge, the CLK signal should be fixed to "L". And so, before the CE signal is raised, the I/O signal should be fixed to "L".
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NJU6356
3. Timer Data Writing When both of the I/O terminal and the CE terminal are "H", update is stopped, the oscillator divider is cleared, and the timer data can be written to the NJU6356. The timer data is written into the shift register from the DATA terminal by synchronized with rising edge of the clock signal input from the CLK terminal, and the data is transferred from the shift register to the timer counter by synchronized with falling edge of the CE signal. In this time the second-counter is cleared to "0", and the oscillator divider start the operation. The input data strings are LSB first of each digit as shown below. Type E Days of Hour Minute Second Week The data is read out from LSB of Year, and last 44-bit is effective. Year Month Day
< Write Down Timing >
CLK
CE I/O Data Input 0 1 2 3 4 Year Shift Register 0 1 2 3 4 5 6 7 3 5 6 7 3 4 5 6 7
Minute 4 5 6 7
The data is input into the shift register at rising edge of the CLK.
The data in the shift register is transferred to the timer counter at this falling edge of the CE, then the oscillator divider start the operation.
Note) When the CE signal is which rising edge or falling edge, the CLK signal should be fixed to "L". And so, before the CE signal is raised, the I/O signal should be fixed to "H".
4. Low Voltage Detector The NJU6356 series incorporate the low battery detector. If the supply voltage reduce to the detection level, (EE)H is written into each digit of the shift register as warning code for the CPU. 5. Data Access The NJU6356 series can operate from 2.0V to 5.5V. However, it is not allow the data access out of the range of 5V10%. It may be broken the data unless 5V10%. Thus, when the data access, the CE terminal should be "H" after the power supply rise to 5V10%, then start the operation.
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NJU6356
sABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL Supply Voltage VDD Input Voltage VIN Power Dissipation PD Operating Temperature Range Topr Storage Temperature Range Tstg RATING -0.3 to +6.0 VSS-0.3 to VDD+0.3 250(DIP8) 200(DMP8) -30 to +80 -55 to +150 (Ta=25C) UNIT V V mW C C
sELECTRICAL CHARACTERISTICS DC Characteristics PARAMETER Operating Current Low Battery Detect Voltage (VDD=2.0V, Ta=25C) MAX UNIT 4.0 uA 1.7 V
SYMBOL CONDITIONS IDD XT=32.768kHz, CE=0V VDET
MIN 1.1
TYP 3.0
PARAMETER Operating Voltage Operating Current 3-st. Leakage Current Input Leakage Current Input Current Input Voltage Output Voltage
SYMBOL VDD IDD ITSL IIL ICE VIH VIL VOH VOL
CONDITIONS XT=32.768kHz, CE=0V DATA (CE=0V) I/O, CLK CE (CE=VDD) I/O, CE, CLK, DATA I/O, CE, CLK, DATA DATA (IOH=-0.4mA) DATA (IOL=1.0mA)
MIN 4.5 -2.0 -1.0 0.8VDD VSS 4.1
(VDD=5.0V10%, Ta=25C) TYP MAX UNIT 5.5 V 4 15 uA 2.0 uA 1.0 uA 20 uA VDD V 0.2VDD 0.4 V
AC Characteristics PARAMETER SYMBOL CLK Pulse "H" Period tCWH CLK Pulse "L" Period tCWL CE Set-up Time Before tCS CLK Rising CE Hold Time After CLK Falling tCH I/O Set-up Time tDS Before CLK Rising I/O Hold Time After CLK Falling tDH Write Down Data Set-Up Time tWDS Write Down Data Hold Time tWDH Data Delay Time tRDD After CLK Falling Rise/Fall Time tRF
CONDITIONS
(VDD=5.0V10%, Ta=25C, CL=50pF) MIN TYP MAX UNIT 0.47 5000 us 0.47 5000 us 470 20 60 20 100 20 200 50 ns ns ns ns ns ns ns ns
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NJU6356
CLK
CLK
CE
tCS
tCH
CE
tCS
tCH
I/O
(in)
tDS
tDH
I/O
(out)
tDS
tDH
tWDS tr 80% tf
tCWL tCWH 50% 50%
CLK
Vss
CLK
20% tWDH 80%
50% 20% tRDD 80%
80%
Input Data
20%
20%
Output Data
20%
Vss
sAPPLICATION CIRCUIT
Main Power Supply VDD
NJU6356
VDD DATA
I/O
CPU
CLK
CE VSS XT XT
[CAUTION] The specifications on this data book are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this data book are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.
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